1. Field of the Invention
The present invention relates to the improvement of a D/A conversion circuit.
2. Description of the Related Art
An example of a conventional D/A conversion circuit is explained in the following, while referring to FIG. 1.
Referring now to FIG. 1, a series of digital data group which bear level signal information such as audio signal data of a 16 bit L or R channel decoded at an audio signal processor of a CD player etc. are supplied to a data controller 1.
The data controller 1 supplies the supplied digital data to a D/A converter 2 as non-reversed data and also it obtains reversed data which are obtained by reversing only the polarity of each block of supplied digital data and supplies the reversed data to a D/A converter 3 in synchronization with the supply of corresponding non-reversed data to the D/A converter 2.
The D/A converter 2 generates an output voltage "a" with a level corresponding to the polarity and the value of the non-reversed data, and supplies it to a sample-hold circuit 4. The D/A converter 3 generates an output voltage "b" with a level corresponding to the polarity and the value of the reversed data, and supplies it to a sample-hold circuit 5.
The sample-hold circuits 4 and 5 receive and hold the output voltages of the D/A converters corresponding to the timing clock pulses "C" corresponding to the data supplied from the data controller 1. The holding output "d" of the sample-hold circuit 4 is supplied to the positive-phase input terminal of a differential amplifier 6, and the holding output "e" of the sample-hold circuit 5 is supplied to the negative phase input terminal of the differential amplifier 6.
The differential amplifier 6 generates a voltage "f" corresponding to the level difference between the two voltages held by the sample-hold circuits 4 and 5.
Next, the operation of a device is described referring to FIG. 2 in the following.
When a series of digital data group are supplied to the data controller 1, the data controller 1 obtains two kinds of data having the same absolute values and opposite polarities concerning the digital data and supplies them to D/A converters 2 and 3. Therefore, the outputs "a" and "b" of the D/A converters 2 and 3 vary complementarily as shown in FIG. 2A and FIG. 2B.
Two outputs "a" and "b" of these D/A converters are held as shown in FIG. 2D and FIG. 2E by sample-hold circuits 4 and 5 which remove glitch noise operating in synchronization with the timing clock pulses "c". The differential amplifier 6 generates an output "f" which is proportional to the level difference between the holding outputs "d" and "e" of sample-hold circuits 4 and 5.
In the arrangement as mentioned in the above, there is a merit that the D/A conversion output "f" has a double dynamic range as shown in FIG. 2F in comparison with the D/A conversion output characteristics when a single D/A converter is used as shown in FIG. 2A.
Two units of expensive D/A converters are used in the above constitution. Four units of D/A converters are needed in total in the case a digital audio device which generally have 2-channel signal processors, which cannot be neglected from the point of view of manufacturing cost. It is also a demerit that when the characteristics of these two D/A converters to be used in a pair are not identical, distortion occurs in the conversion output.